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Electronics Engineering Objective Questions { Digital Circuit and Microprocessor }

365. A master-slave flip-flop has the characteristic that
A. change in the input immediately reflected in the output
B. change in the output occurs when the state of the master is affected
C. change in the output occurs when the state of the slave is affected
D. both the master and the slave states are affected at the same time
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366. The range of signed decimal numbers that can be represented by 6-bite l's complement number is
A. ?31 to + 31
B.? 63 to + 64
C. ? 64 to + 63
D. ?32 to + 31
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367. A digital system is required to amplify a binary-encoded audio signal. The user should be able to control the gain of the amplifier from a minimum to a maximum in 100 increments. The minimum number of bits required to encode, in straight binary, is
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368. Choose the correct one from among the alternatives A, B, C, D after matching an item from Group 1 with the most appropriate item in Group 2.Group 1-Group 2,P: Shift register, Q : Counter,1: Frequency division,R: Recoder,2: Addressing in money chips,3: Serial to parallel,data conversion
A. P-3, Q-2, R-1
B. P-3, Q-1, R-2
C. P-2, Q-1, R-3
D. P-1, Q-2, R-2
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369. The Boolean expression AC + BC is equivalent to
A. TC+13-e- +AC
B.-gC+AC+BT -A-CI3-
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370. 11001, 1001 and 111001 correspond to the 2's complement representation of which one of the following sets of number?
A. 25, 9 and 57 respectively
B. ?6, ?6 and ?6 respectively
C. ?7, ?7 and ?7 respectively
D. ?25, ?9 and ?57 respectively
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371. The 8255 Programmable Peripheral Interface is used as described below.(I) An A/D converter is interfaced to a microprocessor through an 8255. The conversion is initiated by a signal from the 8255 on Port C.A signal on Port C causes data to be strobed into Port A.(II) Two computers exchange data using a pair of 8255s. Port A works as a bidirectional data port supported by appropriate handshaking signals.The appropriate modes of operation of the 8255 for (I) and (II) would be
A. Mode 0 for (I) and Mode 1 for (II)
B. Mode 1 for (I) and Mode 0 for (II)
C. Mode 2 for (I) and Mode 0 for (II)
D. Mode 2 for (I) and Mode 1 for (II)
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