1. On the fifth clock pulse, a 4-bit Johnson sequence is Q0 = 0, Q1 = 1, Q2 = 1, and Q3 = 1. On the sixth clock pulse, the sequence is ________.
A.Q0 = 1, Q1 = 0, Q2 = 0, Q3 = 0
B.Q0 = 1, Q1 = 1, Q2 = 1, Q3 = 0
C.Q0 = 0, Q1 = 0, Q2 = 1, Q3 = 1
D.Q0 = 0, Q1 = 0, Q2 = 0, Q3 = 1

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2. The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?
A.0000
B.0010
C.1000
D.1111

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3. What is a shift register that will accept a parallel input, or a bidirectional serial load and internal shift features, called?
A.tristate
B.end around
C.universal
D.conversion

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4. On the third clock pulse, a 4-bit Johnson sequence is Q0 = 1, Q1 = 1, Q2 = 1, and Q3 = 0. On the fourth clock pulse, the sequence is ________.
A.Q0 = 1, Q1 = 1, Q2 = 1, Q3 = 1
B.Q0 = 1, Q1 = 1, Q2 = 0, Q3 = 0
C.Q0 = 1, Q1 = 0, Q2 = 0, Q3 = 0
D.Q0 = 0, Q1 = 0, Q2 = 0, Q3 = 0

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5. A bidirectional 4-bit shift register is storing the nibble 1101. Its RIGHT/ LEFT input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ___________________.
A.1101
B.0111
C.0001
D.1110

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6. How can parallel data be taken out of a shift register simultaneously?
A.Use the Q output of the first FF.
B.Use the Q output of the last FF.
C.Tie all of the Q outputs together.
D.Use the Q output of each FF.

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7. What does the output enable do on the 74395A chip?
A.It determines when data can be loaded.
B.It forces all outputs to go HIGH.
C.It forces all outputs to go LOW.
D.It activates the three-state buffer.

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